专题：Advancements in PLL and VCO Technologies

This cluster of papers focuses on the design, analysis, and optimization of phase-locked loops (PLLs) and related components in high-speed circuits. Topics include frequency synthesizers, time-to-digital converters, jitter analysis, digital PLLs, charge pumps, clock recovery techniques, delta-sigma modulators, and their application in high-speed communication systems.
最新文献
A 16 Gb/s 48.9 fJ/b PVT-Tolerant Standard-Cell-Based Receiver for AC-Coupled Chiplet Interconnects

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Linearly Controllable Infinite Phase Shifter Using Current Output DACs with Tapped Load Resistors

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An Aging-Robust 32MHz RC Frequency Reference with 0.4ppm Allan Deviation and ±1550ppm Inaccuracy from -40°C to 125°C after a 1-Point Trim

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A Fractional Spur Compensation Technique in Digital PLLs with over 30dB Spur Suppression

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A 180-nm CMOS fully digital chaotic Lorenz system

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Pushing the Limits of PIN Photodiode Direct Detection: Integrate-and-Dump Receivers With CDS Equalization Closing the Gap to the Quantum Limit to 13.9 dB

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Precision Clock: A Multi-Frequency Generator for Soc Application

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High performance inductorless CML divider design in CMOS technology

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A 14-bit 1.25GS/s single-channel pipelined ADC with distributed differential reference voltage buffer and hybrid mixed-signal foreground and background calibration

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Letter: Balancing, timing, and efficiency in tricuspid TEER

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近5年高被引文献
Analog-to-Digital Conversion

book Full Text OpenAlex 139 FWCI9.3159

A 1.41pJ/b 224Gb/s PAM-4 SerDes Receiver with 31dB Loss Compensation

article Full Text OpenAlex 89 FWCI28.0544

A 20-GHz PLL With 20.9-fs Random Jitter

article Full Text OpenAlex 67 FWCI5.8083

TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes

article Full Text OpenAlex 66 FWCI5.2141

A Sub-1 ppm/°C Bandgap Voltage Reference With High-Order Temperature Compensation in 0.18-μm CMOS Process

article Full Text OpenAlex 61 FWCI4.722

TROT: A Three-Edge Ring Oscillator Based True Random Number Generator With Time-to-Digital Conversion

article Full Text OpenAlex 61 FWCI6.014

A D-Band Joint Radar-Communication CMOS Transceiver

article Full Text OpenAlex 61 FWCI5.4395

Wireless Picosecond Time Synchronization for Distributed Antenna Arrays

article Full Text OpenAlex 56 FWCI7.4591

A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET

article Full Text OpenAlex 54 FWCI7.2295

Time-to-digital conversion techniques: a survey of recent developments

article Full Text OpenAlex 54 FWCI7.2247