Advancements in PLL and VCO Technologies -- 专题文献

专题：Advancements in PLL and VCO Technologies

This cluster of papers focuses on the design, analysis, and optimization of phase-locked loops (PLLs) and related components in high-speed circuits. Topics include frequency synthesizers, time-to-digital converters, jitter analysis, digital PLLs, charge pumps, clock recovery techniques, delta-sigma modulators, and their application in high-speed communication systems.

专题：Advancements in PLL and VCO Technologies

最新文献

34.2 Compact, Low-Power 60-and-77GHz 4T/4R Multi-Mode FMCW Radar RFICs in 28nm CMOS

High-speed ADC clock jitter measurement and compensation algorithm for the mid- and high-frequency sampling region

A 1-kHz BW 106-dB SNDR DT Zoom ADC

A 12-bit 40-MS/s Pipelined SAR ADC for Ultrasonic Nondestructive Testing Applications

A Reproducible FPGA–ADC Synchronization Architecture for High-Speed Data Acquisition

Low-DC-Power, Low-Phase-Noise W-Band Differential Fundamental Oscillators and G-Band Push–Push Oscillators With Mesa Engineering in 70-nm GaAs pHEMT Technology

Sampled‐Data Time‐Mode Analog Integrators

Carrier Phase Noise Impact on OFDM Performance at D-Band: Concepts and Experimental Assessment

Analysis and Design of Data Converters

Low-Phase-Noise and Low-Jitter Signal Generation Techniques for 5G/6G and Quantum Computing Applications

近5年高被引文献